Review the evidence signals before interviewing. Then use the anchored descriptions—not instinct alone—to choose the score that best matches each answer.
01
Evaluation factor
Technical depth
35% weight
Probe depth in MEMS device physics: squeeze-film damping, pull-in voltage, residual stress control, DRIE aspect ratios, SOI versus bulk process choices, and COMSOL or ANSYS modal simulation.
Evidence to listen for
Explains the physics or mechanism behind their work, not just the tooling
Names the standards, tolerances, and constraints they designed against
Can defend a design decision under follow-up questions
Distinguishes what they personally engineered from what the team delivered
Five-point scoring guide
1
Poor
Cannot explain the fundamentals of their own stated specialism.
2
Needs Improvement
Knows the vocabulary but not the underlying mechanism; struggles under follow-ups.
3
Satisfactory
Solid working knowledge for the role; depth thins out on edge cases.
4
Very Good
Strong command of the domain; explains trade-offs and defends decisions well.
5
Excellent
Explains device behaviour from first principles, links simulated resonance and damping to measured Q, names specific mask and etch constraints.
02
Evaluation factor
Work that shipped
30% weight
Ask which MEMS devices reached tape-out or volume: accelerometers, gyros, micromirrors, pMUTs. Check their role in PDK development, wafer-level bonding, and yield ramp figures.
Evidence to listen for
Names specific programmes, parts, or systems that reached production or field use
States their own scope inside the project
Can give measured outcomes: yield, cycle time, cost, failure rate
Explains what went wrong and what they changed
Five-point scoring guide
1
Poor
No delivered work; experience is coursework, lab-only, or purely observational.
2
Needs Improvement
Contributed to projects but cannot say what shipped or what their part was.
3
Satisfactory
Has delivered real work; outcomes described without numbers.
4
Very Good
Names shipped work and their scope, with some measured results.
5
Excellent
Names shipped parts, their foundry or fab, wafer counts, yield improvement from split-lot experiments, and their own contribution to each step.
03
Evaluation factor
Diagnosis under uncertainty
20% weight
Test failure analysis instinct: stiction, particle contamination, drift over temperature, package-induced stress. Look for use of DOE, SEM cross-sections, laser Doppler vibrometry, and burn-in data.
Evidence to listen for
Describes a real failure they chased to root cause
Shows a method: isolate variables, reproduce, measure, eliminate
Distinguishes correlation from cause
Says what they ruled out and why, not only what the answer turned out to be
Five-point scoring guide
1
Poor
No diagnostic method; guesses or escalates immediately.
2
Needs Improvement
Trial and error with no structure; cannot explain how they narrowed the cause.
3
Satisfactory
Reasonable method on familiar problems; less structured on novel ones.
4
Very Good
Clear systematic approach with a real root-cause story.
5
Excellent
Walks through a real yield or drift excursion, isolates root cause with cross-section or vibrometry evidence, states what the fix changed.
04
Evaluation factor
Working across the org
15% weight
Assess handoffs to ASIC designers, process integration engineers, and foundry partners; look for ownership of PCM specs, PDK release notes, and reliability qualification with test teams.
Evidence to listen for
Explains technical constraints to non-technical stakeholders without condescension
Has negotiated scope, cost, or timeline with manufacturing, product, or suppliers
Documents decisions so others can act on them
Takes review feedback without defensiveness
Five-point scoring guide
1
Poor
Cannot communicate outside their specialism; dismissive of other functions.
2
Needs Improvement
Communication gaps cause rework; avoids stakeholder contact.
3
Satisfactory
Works adequately with other teams; documentation is thin.
4
Very Good
Communicates clearly across functions; reliable collaborator.
5
Excellent
Describes concrete negotiations with fab and ASIC counterparts, documents interface specs, keeps schedules aligned across long fab cycle times.
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